Minimodule SET-Mini-S2 based on Xilinx Spartan-2 FPGA

General view

The module SET-Mini-S2 is intended for IC's prototyping on Xilinx FPGA. There is a modern Spartan-2 family FPGA with density up to 200K gates installed on the module. The module has 140 digital input-output LVTTL lines and 48õ60mm overall dimensions.

Block diagram

Possible applications:

IC's prototyping standalone control and data acquisition devices FPGA operation familiarization

Features:

Xilinx Spartan-2 family FPGA with 50-200K gates range in PQ208 package Spartan-2 FPGA system clock rate - up to 200ÌHz XC2S200-6 FPGA placement ability with up to 70% gates usage:   up to 30 of 8-bits multipliers at 150ÌHz up to 8 of 16-bits multipliers at 120ÌHz up to 14 on-chip dual port 4-Kbits RAM banks FPGA internal x2 and x4 clock frequency multiplication by DLL means up to 140 user LVTTL 12mÀ I/O lines 5V peripherals compatibility control FPGA configurating Xilinx ISP PROM up to 2Ìbits one external +5V power supply voltage on-board FPGA core +2.5V and peripherals +Ç.ÇV power supplies JTAG IEEE 1149.1 channel 48x60x7mm overall dimensions commercial amd industrial (-40÷+85°Ñ) module versions

Supplied configurations:

Basic configuration:

FPGA configurating Xilinx ISP 2Ìbits PROM onboard digital converters +2.5V and +3.3V up to 2A current limit on-board power supply +2.5V and +3.3V voltages supervisor FPGA debugging and Xilinx PROM download JTAG connector

Delivery options:

Delivery kit software:

Xilinx WebPACK CAD with built-in XST Xilinx VHDL-synthesizer starting VHDL-simulator ModelSim XE from Model Technology ISE CAD test VHDL design 8-bits RISC ÐIÑ15Ñ5õ microcontroller core (optionally)

For additional information please refer  capt@setdsp.ru